The present invention relates generally to integrated circuit (IC) fabrication, More particularly, the present invention relates to a method of reducing outgassing from the photoresist layer and a barrier for reducing outgassing from the photoresist layer.
Integrated circuit (IC) fabrication techniques often utilize a photoresist material or layer to selectively form various IC structures, regions, and layers. Radiation is provided through or reflected off a mask or reticle to form an image on the photoresist layer on a semiconductor wafer. The photoresist layer is positioned to receive the radiation transmitted through or reflected off the mask or reticle. The image received by the photoresist layer corresponds to the pattern on the mask or reticle. The radiation can be light, such as ultra-violet light, vacuum ultra-violet (VUV) light and deep ultra violet light. The radiation can also be x-ray radiation, e-beam radiation, etc.
Generally, the patterned photoresist material can be utilized to define doping regions, deposition regions, etching regions, or other structures associated with an integrated circuit (IC). A conventional lithographic system is generally utilized to project the image to the photoresist material or layer. For example, conventional lithographic system includes a source of radiation, an optical system, and the reticle or photomask. The source of radiation provides radiation through the optical system and through or off of the mask or reticle. A pellicle can be employed between the mask and the wafer to protect mask.
According to one example of a conventional fabrication technique, light is exposed through a binary mask to a photoresist layer on a layer of material. The light can be provided at a number of different wavelengths including 248 nm, 193 nm, and 157 nm. The photoresist layer may be either a positive or a negative photoresist material.
In the case of a positive photoresist material, the light causes photochemical reaction in the photoresist layer. The photoresist layer is removable with a developer solution at the portions of the photoresist that are exposed to light through a mask. The photoresist layer is developed to clear away those portions. An integrated circuit feature, such as a gate, via, or interconnect, is then etched or doped into the layer of material, and the remaining photoresist is removed. In the case of a negative photoresist material, the light causes the photoresist layer to be removable with a developer solution at portions of the photoresist layer that are not exposed to light through the mask.
Various types of photoresist materials are manufactured by a number of manufacturers. The photoresist material can include multiple photoresist films (i.e. a multi-level resist (MLR)). According to some conventional processes, the photoresist layer is provided over an anti-reflective coating (ARC), such as silicon nitride (Si3N4) or silicon oxynitride (SiON). The anti-reflective coating is disposed above the material which is to be processed.
The composition of photoresist materials generally includes large molecules or polymers which are susceptible to outgassing during the IC fabrication process. Outgassing refers to the release of gas or vapor from a solid and is particularly problematic in vacuum or low pressure environments associated with IC fabrication (e.g., vacuum ultraviolet light lithography). For example, organic photoresist materials can release carbon-containing gasses.
Outgassing can contaminate various components associated with IC fabrication equipment. In particular, outgassing from the photoresist layer can contaminate expensive lenses associated with lithographic equipment. The contamination adversely affects the image quality associated with the lithographic equipment.
The contamination can require that the lenses be cleaned by a laser or by purging gasses. Accommodating these types of cleaning operations adds to the complexity of the design of the lithographic equipment. Also, the cleaning operations increase the cycle time associated the lithographic equipment, thereby increasing IC fabrication costs.
U.S. Pat. No. 4,851,691 discloses a pretreating method of attenuating outgassing of a patterned photoresist layer. The patterned photoresist layer is formed upon a substrate. Prior to processing the substrate with a high energy ion beam, the patterned photoresist layer is bombarded with ions which are electrically inactive with respect to the substrate. Similarly, U.S. Pat. No. 5,858,623 discloses an ion implantation technique to reduce outgassing complications. Despite these techniques, outgassing remains a considerable problem for IC fabrication processes and IC lithographic equipment.
Thus, there is a need for a process which is less susceptible to photoresist outgassing. Further still, there is a need for a barrier which protects lithographic equipment from outgassing associated with the photoresist layer. Even further still, there is a need for a method of manufacturing an integrated circuit which provides an inexpensive barrier to prevent photoresist outgassing.
An exemplary embodiment relates to a method of manufacturing the integrated circuit which reduces susceptibility to outgassing from a photoresist. The method includes providing a layer of the photoresist over a material, providing a barrier layer over the layer of the photoresist, and exposing the layer of the photoresist to patterned radiation. The method also includes removing the barrier layer and developing the layer of the photoresist.
Another exemplary embodiment relates to an integrated circuit on a semiconductor substrate. The integrated circuit is fabricated by steps of: providing a layer of photoresist over a layer of material, and providing a barrier layer over the layer of the photoresist. These steps can also include exposing the layer of the photoresist to light through a mask, removing the barrier layer, and developing the layer of the photoresist to remove a portion of the photoresist to form a photoresist feature.
Still another exemplary embodiment relates to an integrated circuit (IC) wafer. The wafer includes a photoresist layer and a barrier layer. The barrier layer is disposed above the photoresist layer. The barrier layer is adjacent the photoresist layer and is translucent at the actinic wavelength of the photoresist layer. The photoresist layer and the barrier layer can be stripped during the fabrication of an IC on the wafer.